Additional Error Injection Options - 3.1 English

UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187)
Document ID
PG187
Release Date
2024-06-05
Version
3.1 English

In addition to Linear Frame Address (LFA), error injections can also be performed using Physical Frame Address (PFA). This alternate format can be used for the error injection commands executed from both the Monitor (or UART) and Command Interfaces.

Table 1. Additional UART Commands for Error Injection
Command UART Command Set
Error Injection Using PFA

“N {10-digit hex value}”

UltraScale = Binary value = 0sst trrr rrrc cccc cccc cmmm mmmm wwww wwwb bbbb

UltraScale+ = Binary value = 00ss 0ttt rrrr rrcc cccc cccc mmmm mmmm wwww wwwb bbbb
Binary Value Equals to
ss Hardware slr number (2-bit)
tt

or

ttt

Block type (2-bit for UltraScale or 3-bit for UltraScale+)
rrrrrr Row address (6-bit)
cccccccccc Column address (10-bit)
mmmmmmm Minor address (7-bit for UltraScale or 8-bit for UltraScale+)
wwwwwww Word address (7-bit)
bbbbb Bit address (5-bit)

Valid in Idle state. Valid for Mitigation and Testing, Detect and Testing, or Emulation modes only.
Table 2. Additional Command Format for Error Injection
Command

Command_code[n – 1:0] Format

n = 40 for UltraScale and n = 44 for UltraScale+ Devices
Error Injection Using PFA

UltraScale = Binary value = 0sst trrr rrrc cccc cccc cmmm mmmm wwww wwwb bbbb

UltraScale+ = Binary value = 00ss 0ttt rrrr rrcc cccc cccc mmmm mmmm wwww wwwb bbbb
Binary Value Equals to
ss Hardware slr number (2-bit)
tt

or

ttt

Block type (2-bit for UltraScale or 3-bit for UltraScale+)
rrrrrr Row address (6-bit)
cccccccccc Column address (10-bit)
mmmmmmm Minor address (7-bit for UltraScale or 8-bit for UltraScale+)
wwwwwww Word address (7-bit)
bbbbb Bit address (5-bit)

Valid when controller is in Idle state. Valid for Mitigation and Testing, Detect and Testing, or Emulation modes only.