Verification - 3.1 English

UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187)

Document ID
PG187
Release Date
2024-06-05
Version
3.1 English

The SEM verification objectives are derived from the functional specification of the product. Verification is performed to ensure a high-quality product that uses a hardware verification methodology. The techniques and tools used were:

  • Dynamic checks through a hardware test bench. The functional coverage compares design behavior against the expected behavior.
  • Static checks through a checking tool suite:
    • Linting
    • Clock Domain Crossing

The SPI flash devices used in the hardware verification platform were:

  • Devices with 256 Mb read boundaries:
    • M25P128 (ST Microelectronics/Numonyx)
    • M25L25635E (Macronix)
    • N25Q512 (Micron)
    • N25Q00 (Micron)
  • Devices with no read boundaries:
    • MT25QL01GB (Micron)
    • MT25QL02GC (Micron)