The synchronous RX Local bus interface provides packet-oriented data much like the TX Local bus interface accepts. All signals are synchronous with the rising-edge of the Local bus clock. The following figure shows a sample waveform for two data transactions for 65-byte packets using a 512-bit segmented LBUS.
Data is supplied by the 100G Ethernet IP
core on every clk
clock cycle when rx_enaout
is asserted. This signal qualifies the other
outputs of the RX Local bus interface.
The RX is similar to the TX, in that
rx_sopout
identifies the start of a packet and
rx_eopout
identifies the end of a packet. Both
rx_sopout
and rx_eopout
are asserted during the same cycle for packets that are less
than or equal to the bus width.
As in the TX, the first byte of a packet
is supplied on the most significant bits of rx_dataout
. For a 128-bit wide segment, the first byte of the packet
is written on bits [127:120], the second byte on bits [119:112], and so forth.
As in the TX, portions of packets are
written on the bus in the full width of the bus unless rx_eopout
is asserted. When rx_eopout
is asserted, the rx_mtyout
bus indicates how many byte lanes in the data bus are invalid. The encoding is the
same as for tx_mtyin
.
During the last cycle of a packet, when
rx_eopout
is asserted with rx_enaout
, rx_errout
might also be asserted. This indicates the packet received had one of the following
errors:
- FCS error
- Length out of the valid range (64 to ctl_rx_max_packet_len bytes)
- Bad 64B/66B code received during receipt of the packet
There is no mechanism to back-pressure
the RX Local bus interface. The user logic must be capable of receiving data when
rx_enaout
is asserted.