CMAC with GTM Mapping - 3.1 English - PG203

UltraScale+ Devices Integrated 100G Ethernet Subsystem LogiCORE IP Product Guide (PG203)

Document ID
PG203
Release Date
2024-07-17
Version
3.1 English

The mapping between the 100G Ethernet IP with high speed GTM transceiver along with the clocking and reset modules are depicted in the following figures.

Figure 1. CMAC Clock and Reset – 100GAUI-2 GTM with Transcode Configuration

Figure 2. CMAC Clock and Reset – CAUI-4 GTM Configuration

Figure 3. CMAC Clock and Reset – 100GAUI-4 GTM Configuration

The supported GTM configurations for CMAC is shown in the following table.

Table 1. Supported CMAC-GTM Configurations
Configuration GTM Presets Used Line Rate (Gb/s) GTM Data Encoding GTM Data Width
100GAUI-2 GTM-PAM4_100GAUI_2 53.125 PAM4 160
CAUI-4 GTM-NRZ_CAUI_4 25.78125 NRZ 64
100GAUI-4 GTM-NRZ_100GAUI_4 26.5625 NRZ 64