The following table lists the additional signals available when the auto-negotiation feature is present.
Name | I/O | Clock Domain | Description |
---|---|---|---|
ctl_autoneg_enable | I | init_clk | Enable signal for auto-negotiation. |
ctl_autoneg_bypass | I | init_clk | This input disables auto-negotiation and bypasses the auto-negotiation function. When this input is asserted, auto-negotiation is turned off, but the PCS is connected to the output to allow operation. |
ctl_an_nonce_seed[7:0] | I | init_clk | 8-bit seed to initialize the nonce field polynomial generator. |
ctl_an_pseudo_sel | I | init_clk | Selects the polynomial generator for the bit 49 random bit generator. If this input is 1, then the polynomial is x7+x6+1. When this input is Low, the polynomial is x7+x3+1. |
ctl_restart_negotiation | I | init_clk | This input triggers a restart of the auto-negotiation, regardless of what state the circuit is currently in. |
ctl_an_local_fault | I | init_clk | This input signal sets the local_fault bit of the transmit link codeword. |
Signals Used for PAUSE Ability Advertising | |||
ctl_an_pause | I | init_clk | This input sets the PAUSE bit, (C0), of the transmit link codeword. |
ctl_an_asmdir | I | init_clk | This input sets the ASMDIR bit, (C1), of the transmit link codeword. |
ctl_an_loc_np | I | init_clk | Local Next Page indicator. If this bit is 1, the ANIPC transfers the next page word at input loc_np_data to the remote link partner. If this bit is 0, the ANIPC does not initiate the next page protocol. If the link partner has next pages to send, and the loc_np bit is clear, the ANIPC transfers null message pages. |
ctl_an_loc_np_ack | I | init_clk |
Link Partner Next Page Acknowledge. This is used to signal the ANIPC that the next page data from the remote link partner at output pin lp_np_data has been read by the local host. When this signal goes High, the ANIPC acknowledges reception of the next page codeword to the remote link partner and initiates transfer of the next codeword. During this time, the ANIPC removes the lp_np signal until the new next page information is available. |
Ability Signal Inputs | |||
ctl_an_ability_1000base_kx | I | init_clk | These inputs
identify the Ethernet protocol abilities that are advertised in the transmit link
codeword to the link partner. A value of 1 indicates that the interface advertises
that it supports the protocol. Note: The AN
abilities ctl_an_ability_100gbase_cr10, ctl_an_ability_100gbase_cr4,
ctl_an_ability_100gbase_kp4, and ctl_an_ability_100gbase_kr4 are supported by the
CMAC IP.
|
ctl_an_ability_10gbase_kr | I | init_clk | |
ctl_an_ability_10gbase_kx4 | I | init_clk | |
ctl_an_ability_25gbase_krcr | I | init_clk | |
ctl_an_ability_25gbase_krcr_s | I | init_clk | |
ctl_an_ability_25gbase_kr1 | I | init_clk | |
ctl_an_ability_25gbase_cr1 | I | init_clk | |
ctl_an_ability_40gbase_cr4 | I | init_clk | |
ctl_an_ability_40gbase_kr4 | I | init_clk | |
ctl_an_ability_50gbase_cr2 | I | init_clk | |
ctl_an_ability_50gbase_kr2 | I | init_clk | |
ctl_an_ability_100gbase_cr10 | I | init_clk | |
ctl_an_ability_100gbase_cr4 | I | init_clk | |
ctl_an_ability_100gbase_kp4 | I | init_clk | |
ctl_an_ability_100gbase_kr4 | I | init_clk | |
ctl_an_cl91_fec_request | I | init_clk | This bit is used to request clause 91 FEC. |
ctl_an_cl91_fec_ability | I | init_clk | This bit is used to indicate clause 91 FEC ability. |
stat_an_link_cntl_10gbase_kx4[1:0] | O | init_clk |
Link Control outputs from the auto-negotiation controller auto-negotiation controller. The valid settings are as follows:
|
stat_an_link_cntl_10gbase_kr[1:0] | O | init_clk | |
stat_an_link_cntl_40gbase_kr4[1:0] | O | init_clk | |
stat_an_link_cntl_40gbase_cr4[1:0] | O | init_clk | |
stat_an_link_cntl_100gbase_cr10[1:0] | O | init_clk | |
stat_an_link_cntl_100gbase_kp4[1:0] | O | init_clk | |
stat_an_link_cntl_100gbase_kr4[1:0] | O | init_clk | |
stat_an_link_cntl_100gbase_cr4[1:0] | O | init_clk | |
stat_an_link_cntl_25gbase_krcr_s[1:0] | O | init_clk | |
stat_an_link_cntl_25gbase_krcr[1:0] | O | init_clk | |
stat_an_link_cntl_25gbase_kr1[1:0] | O | init_clk | |
stat_an_link_cntl_25gbase_cr1[1:0] | O | init_clk | |
stat_an_link_cntl_50gbase_kr2[1:0] | O | init_clk | |
stat_an_lnk_cntl_50gbase_cr2[1:0] | O | init_clk | |
stat_an_fec_enable | O | init_clk | This output enables the use of clause 74 FEC on the link. |
stat_an_rs_fec_enable | O | init_clk | This output enables the use of clause 91 FEC on the link. |
stat_an_tx_pause_enable | O | init_clk | This output enables station-to-station (global) pause packet generation in the transmit path to control data flow in the receive path. |
stat_an_rx_pause_enable | O | init_clk | This output enables station-to-station (global) pause packet interpretation in the receive path, in order to control data flow from the transmitter. |
stat_an_autoneg_complete | O | init_clk | This output indicates the auto-negotiation is complete and RX link status from the PCS has been received. |
stat_an_parallel_detection_fault | O | init_clk | This output indicates a parallel detection fault during auto-negotiation. |
stat_an_start_tx_disable | O | init_clk | When ctl_autoneg_enable is High and ctl_autoneg_bypass is Low, this signal cycles High for 1 clock cycle at the very start of the TX_DISABLE phase of auto-negotiation. That is, when auto-negotiation enters state TX_DISABLE, this output will cycle High for 1 clock period. It effectively signals the start of auto-negotiation. |
stat_an_start_an_good_check | O | init_clk | When ctl_autoneg_enable is High and ctl_autoneg_bypass is Low, this signal cycles High for 1 clock cycle at the very start of the AN_GOOD_CHECK phase of auto-negotiation. That is, when auto-negotiation enters the state AN_GOOD_CHECK, this output will cycle High for 1 clock period. It effectively signals the start of link training. However, if link training is not enabled, that is ctl_lt_training_enable is Low, then this output effectively signals the start of the mission-mode operation. |
stat_an_lp_ability_1000base_kx | O | init_clk | These signals indicate the advertised protocol from the link partner. They all become valid when the output signal stat_an_lp_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner. |
stat_an_lp_ability_100gbase_cr10 | O | init_clk | |
stat_an_lp_ability_100gbase_cr4 | O | init_clk | |
stat_an_lp_ability_100gbase_kp4 | O | init_clk | |
stat_an_lp_ability_100gbase_kr4 | O | init_clk | |
stat_an_lp_ability_10gbase_kr | O | init_clk | |
stat_an_lp_ability_10gbase_kx4 | O | init_clk | |
stat_an_lp_ability_25gbase_krcr | O | init_clk | |
stat_an_lp_ability_25gbase_krcr_s | O | init_clk | |
stat_an_lp_ability_25gbase_kr1 | O | init_clk | |
stat_an_lp_ability_25gbase_cr1 | O | init_clk | |
stat_an_lp_ability_40gbase_cr4 | O | init_clk | |
stat_an_lp_ability_40gbase_kr4 | O | init_clk | |
stat_an_lp_ability_50gbase_kr2 | O | init_clk | |
stat_an_lp_ability_50gbase_cr2 | O | init_clk | |
stat_an_lp_pause | O | init_clk | This signal indicates the advertised value of the PAUSE bit, (C0), in the receive link codeword from the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted. |
stat_an_lp_asm_dir | O | init_clk | This signal indicates the advertised value of the ASMDIR bit, (C1), in the receive link codeword from the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted. |
stat_an_lp_rf | O | init_clk | This bit indicates link partner remote fault. |
stat_an_lp_fec_10g_ability | O | init_clk | This signal indicates the clause 74 FEC ability associated with 10Gb/s lane protocols that is being advertised by the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted. |
stat_an_lp_fec_10g_request | O | init_clk | This signal indicates that the link partner is requesting the clause 74 FEC used on the 10 Gb/s lane protocols. It becomes valid when the output signal stat_an_lp_ability_valid is asserted. |
stat_an_lp_fec_25g_rs_request | O | init_clk | This signal indicates that the link partner is requesting the clause 91 RS-FEC be used for the 25 Gb/s lane protocols. It becomes valid when the output signal stat_an_lp_ability_valid is asserted. |
stat_an_lp_fec_25_baser_request | O | init_clk |
This signal indicates that the link partner is requesting that clause 74 FEC be used for the 25 Gb/s lane base-r protocols. It becomes valid when the output signal stat_an_lp_ability_valid is asserted. |
stat_an_lp_autoneg_able | O | init_clk | This signal indicates that the link partner can perform auto-negotiation. It becomes valid when the output signal stat_an_lp_ability_valid is asserted. |
stat_an_lp_ability_valid | O | init_clk | This signal indicates when all of the link partner advertisements become valid. |
stat_an_loc_np_ack | O | init_clk | This signal is used to indicate to the local host that the local next page data, presented at input pin loc_np_data, has been taken. This signal pulses High for 1 clock period when the auto-negotiation core logic samples the next page data on the input loc_np_data. When the local host detects this signal High, it must replace the 48-bit next page codeword at input pin loc_np_data with the next 48-bit codeword to be sent. If the local host has no more next pages to send, it must clear the loc_np input. |
stat_an_lp_np | O | init_clk | Link Partner Next Page. This signal is used to indicate that there is a valid 48-bit next page codeword from the remote link partner at output pin lp_np_data. This signal is driven Low when the lp_np_ack input signal is driven High, indicating that the local host has read the next page data. It remains Low until the next codeword becomes available on the lp_np_data output pin, the lp_np_output is driven High again. |
stat_an_rxcdrhold | O | init_clk | Indicates the RX CDR Hold signal. |
stat_an_lp_ability_extended_fec[3:0] | O | init_clk | This output indicates the extended FEC abilities. |
stat_an_lp_extended_ability_valid | O | init_clk | When this bit is a 1, it indicates that the detected extended abilities are valid. |
an_loc_np_data[47:0] | I | init_clk | Local Next Page codeword. This is the 48 bit codeword used if the loc_np input is set. In this data field, the bits NP, ACK, & T, bit positions 15, 14, 12, and 11, are not transferred as part of the next page codeword. These bits are generated in the auto negotiation core logic. However, the Message Protocol bit, MP, in bit position 13, is transferred. |
an_lp_np_data[47:0] | O | init_clk | Link Partner Next Page Data. This 48-bit word is driven by the auto negotiation core logic with the 48 bit next page codeword from the remote link partner. |