References - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem LogiCORE IP Product Guide (PG203)

Document ID
PG203
Release Date
2024-07-17
Version
3.1 English

These documents provide supplemental material useful with this guide:

  1. IEEE 1588-2008 (http://standards.ieee.org/findstds/standard/1588-2008.html)
  2. IEEE std 802.3-2012 (https://standards.ieee.org/ieee/802.3/5084)
  3. IEEE std 802.3bj-2014 (https://standards.ieee.org/ieee/802.3bj/5551/)
  4. Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS923)
  5. UltraScale FPGAs Transceivers Wizard LogiCORE IP Product Guide (PG182)
  6. UltraScale Architecture Clocking Resources User Guide (UG572)
  7. UltraScale Devices Integrated 100G Ethernet LogiCORE IP Product Guide (PG165)
  8. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
  9. Vivado Design Suite User Guide: Designing with IP (UG896)
  10. Vivado Design Suite User Guide: Getting Started (UG910)
  11. Vivado Design Suite User Guide: Logic Simulation (UG900)
  12. Vivado Design Suite User Guide: Using Constraints (UG903)
  13. Vivado Design Suite User Guide: Programming and Debugging (UG908)
  14. Vivado Design Suite User Guide: Implementation (UG904)
  15. UltraScale Architecture GTH Transceivers User Guide (UG576)
  16. UltraScale Architecture GTY Transceivers User Guide (UG578)
  17. 10G/25G High Speed Ethernet Subsystem Product Guide (PG210)