This section describes the rules that govern the successful use of the segmented LBUS protocol.
Segment Ordering
The 128-bit segments are ordered 0 to 3 (for a 512-bit segmented LBUS). The first of the 128-bit transfers occurs on segment 0, the second on segment 1, and so forth. During each local bus clock cycle that data is transferred on the segmented LBUS, segment 0 must be active. The segmented bus is aligned so that the first bit of the incoming data is placed at the MSB of segment 0.
Active Segments
Data is transferred in a segment on the
TX interface when the corresponding tx_enainS is a
value of 1. The TX interface buffers data, but packets must be written in their
entirety unless back pressure is applied (see Gaps). Therefore, it is acceptable
to have clock cycles in which none of the tx_enainS signals are active during backpressure. However, during a
clock cycle with tx_enain0 active, segments must
be filled in sequence with no gaps between active segments. The following are some
of the illegal combinations of tx_enainS:
- tx_enain0=0, tx_enain1=1, tx_enain2=1, tx_enain3=1
- tx_enain0=1, tx_enain1=0, tx_enain2=1, tx_enain3=1
- tx_enain0=1, tx_enain1=1, tx_enain2=0, tx_enain3=1
Data is transferred in a segment on the
RX interface when the corresponding rx_enainS is a
value of 1. Similarly, the RX interface buffers data and does not forward until it
has a sufficient quantity. Therefore, there are clock cycles in which none of the
rx_enainS signals are active.
TX Back Pressure
The optimal use of bandwidth requires
that TX local bus data can be written at a rate faster than it can be delivered on
the serial interface. This means that there must be back pressure, or flow-control,
on the TX segmented LBUS. The signals used to implement back pressure are tx_rdyout and tx_ovfout. These signals are common for all segments. When responding
to back pressure during a clock cycle, none of the tx_enainS can be active.
Gaps
The purpose of the segmented LBUS is to provide a means to optimally use the data bus. Therefore, as discussed in Active Segments, segments must be filled in sequence with no gaps between used segments. However, if a segment has an EOP, the following segments might be inactive. For example, the following combinations are permitted during a single clock cycle:
-
tx_enain0=1 tx_eopin0=0 tx_enain1=1 tx_eopin1=0
tx_enain2=1 tx_eopin2=1 tx_enain3=0 tx_eopin3=0
-
tx_enain0=1 tx_eopin0=0 tx_enain1=1 tx_eopin1=1
tx_enain2=0 tx_eopin2=0 tx_enain3=0 tx_eopin3=0
-
tx_enain0=1 tx_eopin0=1 tx_enain1=0 tx_eopin1=0
tx_enain2=0 tx_eopin2=0 tx_enain3=0 tx_eopin3=0