UltraScale+ Device RS-FEC for Integrated 100G Ethernet - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem Product Guide (PG203)

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3.1 English

Reed-Solomon Forward Error Correction (RS-FEC) provides a robust multi-bit error detection and correction algorithm that protects the full 100 Gigabit data stream. This appendix describes the integration of the RS-FEC engine within the AMD UltraScale+™ device integrated 100G Ethernet IP. For a detailed description of the RS-FEC sublayer, refer to IEEE 802.3bj-2014 Clause 91 [Ref 3].

Figure A-1:      Block Diagram of 100G Ethernet MAC With RS-FEC Block (CMAC)

X-Ref Target - Figure A-1