Features - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem LogiCORE IP Product Guide (PG203)

Document ID
PG203
Release Date
2024-07-17
Version
3.1 English
  • Supports CAUI-10, CAUI-4, 100GAUI-2, 100GAUI-4, and runtime switchable between CAUI-4 and CAUI-10 modes
  • 512-bit segmented local bus (LBUS) user interface/AXI4-Stream (AXIS) user interface at ~322 MHz
  • 32-bit interface to the serial transceiver for CAUI-10 lanes, 80-bit interface to the serial transceiver for CAUI-4/100GAUI-4 lanes and 160-bit interface to the serial transceiver for 100GAUI-2 lanes
  • IEEE 1588-2008 (http://standards.ieee.org/findstds/standard/1588-2008.html) one-step and two-step hardware timestamping at ingress and egress at full 80 bits
  • Pause frame processing including priority based flow control per IEEE std 802.3-2012 (https://standards.ieee.org/ieee/802.3/5084)
  • Optional fee-based Auto-Negotiation and Link Training feature for CAUI-4 mode
  • Optional built-in 802.3bj-2014 Clause 91 RS-FEC block in CAUI-4 and runtime switch CAUI-4 modes
  • Receive side OTN interface
  • Optional soft TX OTN interface support