Simplex TX Mode For Simulation - 3.1 English - PG203

UltraScale+ Devices Integrated 100G Ethernet Subsystem LogiCORE IP Product Guide (PG203)

Document ID
PG203
Release Date
2024-07-17
Version
3.1 English

As shown in the above diagram in this mode of operation only the 100G Ethernet IP core transmitter is enabled and packet generator is enabled for the generation of packets. For simulation, a partner test bench is instantiated to perform the functionality of the core receiver. This partner test bench will have a core receiver and a packet monitor to verify the received data form the generator.

The following figure shows the simplex TX mode for simulation.

Figure 1. Simplex TX Mode Simulation Block Diagram