RS-FEC Transcode Bypass Tab - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem LogiCORE IP Product Guide (PG203)

Document ID
PG203
Release Date
2024-07-17
Version
3.1 English

The RS-FEC Transcode Bypass tab is shown in the following figure and is described in the following table.

Figure 1. RS-FEC Transcode Bypass Tab

Table 1. RS-FEC Transcode Bypass Tab
Parameter Description Default Value Range
RS-FEC Transcode Bypass
Enable RS-FEC Transcode Bypass Selects between RS-Encoder/Decoder only and the full 802.3bj RS-FEC sublayer, including transcoding. 0

0: Disable

1: Enable

CMAC Core Selection Select 100G Ethernet Hard IP core location with RSFEC. Based on the FPGA and part number Based on the FPGA and part number
  1. If Enable RS-FEC Transcode Bypass mode is set to Enable, the CMAC Core and GT functionalities are not be available; hence all the other tab options will be disabled.