RS-FEC Sub-Modes - 3.1 English

There are four sub-modes of RS-FEC decoder operation available in both normal mode and transcode bypass mode. Three of these sub-modes are defined by the IEEE 802.3bj specification, and the fourth is a non-standard mode. The following table lists the valid RS-FEC operating sub-modes. All control pins are sampled on the first cycle after rx_reset is deasserted.

Sub-Mode 1: Full Operation

In this sub-mode, the RS-FEC engine detects and corrects errors.

• If a codeword with up to 7 symbol errors is received, the errors are corrected and the data is passed to the Integrated 100G Ethernet.
• If a codeword with 8 or more symbol errors is received, the erroneous data is passed to the Integrated 100G Ethernet with some of the 2-bit synchronization headers corrupted within the 66B/64B encoded stream. This causes the Integrated 100G Ethernet to discard any data packets that are wholly or partially contained within the affected codeword.

Sub-Mode 2: Error Indication, No Error Correction

In this sub-mode, the RS-FEC engine detects errors but does not attempt to correct them.

• If a codeword with no errors is received, the data is passed to the Integrated 100G Ethernet.
• If a codeword with one or more errors is received, the erroneous data is passed to the Integrated 100G Ethernet with some of the 2-bit synchronization headers corrupted within the 66b/64b encoded stream. This causes the Integrated 100G Ethernet to discard any data packets that are wholly or partially contained within the affected codeword.
  Note: If the ctl_rsfec_ieee_error_indication_mode control flag is High, an attempt to disable both error indication and error correction will result in this sub-mode in which error indication is not disabled. This is the behavior required by IEEE 802.3bj Clause 91. In order to disable error indication and error correction simultaneously (that is, to enter sub-mode 3), the IEEE error indication mode must be set to 0.

Sub-Mode 3: No Error Indication Or Error Correction (Non-Standard)

In this sub-mode, the RS-FEC engine detects errors but does not attempt to correct them.

• If a codeword with no errors is received, the data is passed to the Integrated 100G Ethernet.
• If a codeword with one or more errors is received, the erroneous data is also passed to the Integrated 100G Ethernet with no indication that it is incorrect.

To reduce the chance that errors in a packet are undetected, the RS-FEC engine performs additional error monitoring in this mode. The number of symbol errors seen is accumulated over consecutive non-overlapping windows of input codewords. If the symbol error count within any window exceeds a fixed threshold, the RS-FEC engine sets its hi_ser flag to True and causes the data being passed to the Integrated 100G Ethernet to have all of its 2-bit synchronization headers corrupted for a long period (>60ms). This causes the Integrated 100G Ethernet to set its hi_ber flag to true, inhibiting the processing of received packets.

This sub-mode is a non-standard extension to IEEE 802.3bj.

Sub-Mode 4: Correction, No Indication

In this sub-mode, the RS-FEC engine detects and corrects errors.

• If a codeword with up to 7 symbol errors is received, the errors are corrected and the data is passed to the Integrated 100G Ethernet.
• If a codeword with 8 or more symbol errors is received, the erroneous data is also passed to the Integrated 100G Ethernet with no indication that it is incorrect.

To reduce the chance that errors in a packet are undetected, the RS-FEC engine performs additional error monitoring in this mode. The number of symbol errors seen is accumulated over consecutive non-overlapping windows of input codewords. If the symbol error count within any window exceeds a fixed threshold, the RS-FEC engine sets its hi_ser flag to true and causes the data being passed to the Integrated 100G Ethernet to have all of its 2-bit synchronization headers corrupted for a long period (>60 ms). This causes the Integrated 100G Ethernet to set its hi_ber flag to true, inhibiting the processing of received packets.

The primary purpose of the different sub-modes is to allow latency to be reduced in cases where the line BER is low enough that full error correction is not required. The latency of the RS-FEC engine in each available operating mode is shown in the following table.