Using Incremental Implementation Flows - 2020.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-02-18
Version
2020.2 English

In the Vivado Design Suite, you can use incremental implementation to reuse existing placement and routing data, which reduces implementation compile time and produces more predictable results. When working with designs that have 95% or higher reuse, incremental place and route typically achieves at least a twofold improvement over normal place and route compile times while maintaining the WNS of the reference run. For more information, see this link in the Vivado Design Suite User Guide: Implementation (UG904).

Recommended: Incremental implementation is most useful during critical stages of the design cycle when changes to the flow scripts are difficult to make. Ensure that your flow scripts include incremental implementation early in the design cycle so you can enable incremental implementation during critical periods.
Note: For further improvement in compile times and QoR, you can also use incremental synthesis.