Checking for Feedback Structures in Registers - 2020.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

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2020.2 English

Make sure that registers do not have feedback logic, in the example below, because the adder requires the current value of register, this logic cannot be retimed and packed in to a block RAM. The resultant circuit is a block RAM without output registers (DOA_REG and DOB_REG set to '0').

Figure 1. Check the Presence of Feedback on Registers Around the RAM Block