Clocking - 2.2 English

Video PHY Controller LogiCORE IP Product Guide (PG230)
Document ID
PG230
Release Date
2023-11-03
Version
2.2 English
The Video PHY Controller core internally generates GT wrappers by using the GT Wizard. See the following for more information.
  • 7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
  • UltraScale Architecture GTH Transceivers User Guide (UG576)
  • 7 Series FPGAs GTP Transceivers User Guide (UG482)
  • UltraScale Architecture GTY Transceivers User Guide (UG578)
The Video PHY Controller core provides an Advanced clocking mode where North and South clocks for the Quad are exposed for external connections.