RX Control (RXC) Register (0x0100) - 2.2 English

Video PHY Controller LogiCORE IP Product Guide (PG230)
Document ID
PG230
Release Date
2023-11-03
Version
2.2 English
Table 1. RX Control Register
Bit Default Value Access Type Description
Channel 1
0 0 RW Reserved
1 0 RW RX8B10BEN 1
2 0 RW RXPOLARITY (0: Not-inverted 1: Inverted)
3 0 RW RXPRBSCNTRESET
7:4 0 RW RXPRBSSEL[3:0]
7 series PRBS modes:
  • 000 - Standard operation
  • 001 - PRBS-7
  • 010 - PRBS-15
  • 011 - PRBS-23
  • 100 - PRBS-31
UltraScale /UltraScale+ PRBS modes:
  • 000 - Standard operation
  • 001 - PRBS-7
  • 010 - PRBS-9
  • 010 - PRBS-15
  • 011 - PRBS-23
  • 100 - PRBS-31
Channel 2
8 0 RW Reserved
9 0 RW RX8B10BEN 1
10 0 RW RXPOLARITY (0: Not-inverted 1: Inverted)
11 0 RW RXPRBSCNTRESET
15:12 0 RW RXPRBSSEL[3:0]. Refer to Channel 1 for PRBS modes.
Channel 3
16 0 RW Reserved
17 0 RW RX8B10BEN 1
18 0 RW RXPOLARITY (0: Not-inverted 1: Inverted)
19 0 RW RXPRBSCNTRESET
23:20 0 RW RXPRBSSEL[3:0]. Refer to Channel 1 for PRBS modes.
Channel 4
24 0 RW Reserved
25 0 RW RX8B10BEN 1
26 0 RW RXPOLARITY (0: Not-inverted 1: Inverted)
27 0 RW RXPRBSCNTRESET
31:28 0 RW RXPRBSSEL:0]. Refer to Channel 1 for PRBS modes.
  1. For the DisplayPort protocol, this field is tied to 1 for 7 series devices. For the HDMI protocol, this register field is unused .