Software Driver - Deprecated APIs - 2.2 English

Video PHY Controller LogiCORE IP Product Guide (PG230)

Document ID
PG230
Release Date
2023-11-03
Version
2.2 English
  • XVphy_DrpRead replaced by XVphy_DrpRd

    In Vivado 2017.3, the XVphy_DrpRead API was deprecated and replaced by XVphy_DrpRd to facilitate better status returns. In XVphy_DrpRd, the DRP readout return was separated from the XST_FAILURE/XST_SUCCESS return to easily identify if a certain DRP access failed. A new argument *RetVal was added to hold the DRP readout value. The following code example illustrates how to migrate from XVphy_DrpRead to XVphy_DrpRd.

    From XVphy_DrpRead:

    u16 DrpVal;
    DrpVal = XVphy_DrpRead(InstancePtr, QuadId, ChId, 0x63);

    To XVphy_DrpRd:

    u16 DrpVal;
     u32 Status = XST_SUCCESS;
     Status = XVphy_DrpRd(InstancePtr, QuadId, ChId, 0x63, &DrpVal);
    Note: Status holds XST_FAILURE/XST_SUCCESS.
    Note: DrpVal holds the DRP Readout value.
  • XVphy_DrpWrite replaced by XVphy_DrpWr

    In Vivado 2017.3, the XVphy_DrpWrite API was deprecated and replaced by XVphy_DrpWr to align with the naming convention of XVphy_DrpRd. There is no functional difference between the two APIs, and you can replace each XVphy_DrpWrite function call with XVphy_DrpWr.

    From XVphy_DrpWrite:

    u16 DrpVal;
     u32 Status = XST_SUCCESS;
     Status = XVphy_DrpWrite(InstancePtr, QuadId, ChId, 0x63, DrpVal);

    To XVphy_DrpRd:

    u16 DrpVal;
     u32 Status = XST_SUCCESS;
     Status = XVphy_DrpWr(InstancePtr, QuadId, ChId, 0x63, DrpVal);
    Note: Status holds XST_FAILURE/XST_SUCCESS.
    Note: DrpVal holds the value to write to the DRP address.
  • XVphy_HdmiInitialize replaced by XVphy_Hdmi_CfgInitialize

    In Vivado 2017.3, the XVphy_HdmiInitialize API was deprecated and replaced by XVphy_Hdmi_CfgInitialize to provide ease-of-use in handling the VPHY system frequency clock.

    From XVphy_HdmiInitialize:

    #define XPAR_CPU_CORE_CLOCK_FREQ_HZ 100000000
    u32 Status;
    Status = XVphy_HdmiInitialize(&Vphy, 0, XVphyCfgPtr,XPAR_CPU_CORE_CLOCK_FREQ_HZ);

    To XVphy_Hdmi_CfgInitialize:

    u32 Status;
    Status = XVphy_Hdmi_CfgInitialize(&Vphy, 0, XVphyCfgPtr);
    Note: Status holds XST_FAILURE/XST_SUCCESS.