AXI4-Lite Interfaces - 2.2 English

To verify that the interface is functional, read from a register that does not have all 0s as a default. Output s_axi_arready asserts when the read address is valid, and output s_axi_rvalid asserts when the read data/response is valid. If the interface is unresponsive, ensure that the following conditions are met:

• The vid_phy_axi4lite_aclk input is connected and toggling.
• The interface is not being held in reset, and vid_phy_axi4lite_aresetn is an active-Low reset.
• The interface is enabled, and s_axi_aclken is active-High (if used).
• The main core clocks are toggling and that the enables are also asserted.