The normal operation of the AXI Bridge subsystem is dependent on the integrated block for PCIe establishing and maintaining the point-to-point link with an external device for PCIe. If the link has been lost, it must be re-established to return to normal operation.
When a Hot Reset is received by the AXI Bridge subsystem, the link goes down and the PCI Configuration Space must be reconfigured.
Initiated AXI4 write transactions that have not yet completed on the AXI4 bus when the link goes down have a SLVERR response given and the write data is discarded. Initiated AXI4 read transactions that have not yet completed on the AXI4 bus when the link goes down have a SLVERR response given, with arbitrary read data returned.
Any MemWr TLPs for PCIe that have been received, but the
associated AXI4 write transaction has not started
when the link goes down, are discarded.