AXI Verification IP Attached to the AXI Slave Interface - 3.0 English

For DMA/Bridge Subsystem for PCIe in AXI Bridge mode, an alternative example design with AMD AXI Verification IP attached to the AXI Slave interface is available. AXI Verification IP allows you to initiate AXI transfer from an Endpoint configured bridge or generates a larger more complex AXI transfer from a Root Port configured bridge. For more details, see the AXI Verification IP LogiCORE IP Product Guide (PG267).

To enable AXI Verification IP example design option:

1. Add the DMA/Bridge Subsystem for PCIe IP to the design.
2. Run the following Tcl command in AMD Vivado™ console:

   set_property CONFIG.axi_vip_in_exdes true [get_ips <ip_name>]

3. Open the IP Example Design.

The following figure shows the DMA/Bridge Subsystem for PCIe IP in Root Port configuration.

The following figure shows the DMA/Bridge Subsystem for PCIe IP in Endpoint configuration.