Receiving Interrupts - 3.0 English

AXI Bridge for PCI Express Gen3 Subsystem Product Guide (PG194)

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3.0 English

In Root Port mode, you can choose one of the two ways to handle incoming interrupts;

  • Legacy Interrupt FIFO mode: Legacy Interrupt FIFO mode is the default. It is available in earlier Bridge IP variants and versions, and will continue to be available. Legacy Interrupt FIFO mode is geared towards compatibility for legacy designs.
  • Interrupt Decode mode: Interrupt Decode mode is available in the CPM AXI Bridge. Interrupt Decode mode can be used to mitigate Interrupt FIFO overflow condition which can occur in a design that receives interrupts at a high rate and avoids the performance penalty incurred when such condition occurs.

To enable Legacy Interrupt FIFO mode:

set_property -dict [list CONFIG.msi_rx_pin_en {false}] [get_ips <ip_name>]

To enable Interrupt Decode mode:

set_property -dict [list CONFIG.msi_rx_pin_en {true}] [get_ips <ip_name>]

If you are customizing and generating the core in the AMD Vivado™ IP integrator, replace get_ips with get_bd_cells.