MSI Interrupts - 3.0 English

AXI Bridge for PCI Express Gen3 Subsystem Product Guide (PG194)

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3.0 English

Asserting intx_msi_request causes the generation of an MSI interrupt if MSI is enabled.

After intx_msi_request is asserted, it should be de-asserted immediately in the next clock cycle. The intx_msi_grant assertion indicates the requested interrupt has been sent on the PCIe block. The vector number being used in the interrupt packet will be determined based on the value provided at the msi_vector_num[4:0] signal. You must implement a mechanism in the user application to know when the interrupt routine has been serviced. This detection can be done in many different ways depending on your application and your use of this interrupt pin. This typically involves a register (or array of registers) implemented in the user application that is cleared, read, or modified by the host software when an Interrupt is serviced.

The intx_msi_request signal is positive-edge detected and synchronous to axi_aclk. intx_msi_request must be de-asserted for at least one axi_aclk cycle before re-asserting it to send another MSI interrupt on the same vector or on a different vector.

The MSI vector number being used must not exceed the number of MSI vectors being enabled by the host. This information can be queried from msi_vector_width[2:0] signal after the host enumerated and enabled MSI interrupt at runtime. The encoding of msi_vector_width[2:0] signal is shown in the following table.

Table 1. MSI Vectors Enabled in Message Control Register
Value Number of Messages Requested Output Signal, MSI_Vector_Width (2:0)
000 1 000
001 2 001
010 4 010
011 8 011
100 16 100
101 32 101
Figure 1. MSI Interrupts