The VSEC capability register (described in the following table) allows the memory space for the core to appear as though it is a part of the underlying integrated block PCIe configuration space. The VSEC is inserted immediately following the last enhanced capability structure in the underlying block. VSEC is defined in the PCI Express Base Specification, v1.1 (7.19 of v2.0), available from PCI-SIG Specifications (https://www.pcisig.com/specifications).
| Bits | Name | Core Access | Reset Value | Description |
|---|---|---|---|---|
| 15:0 | VSEC Capability ID | RO | 0x000B | PCI-SIG™ defined ID identifying this Enhanced Capability as a Vendor-Specific capability. Hardcoded to 0x000B. |
| 19:16 | Capability Version | RO | 0x1 | Version of this capability structure. Hardcoded to 0x1. |
| 31:20 | Next Capability Offset | RO | 0x000 | Offset to next capability. |