There are two ways to change the PCIe address translation:
- Address translation from the IP GUI configuration.
- Address translation through registers.
- Address translation from the IP GUI configuration
- Set Aperture Base Address and Aperture High Address to a desired value during the IP configuration. You should set AXI to PCIE Translation to all 0s.
- Address translation through registers
- AXI base address translation register are listed in cpm4-bridge-v2-1-register.csv file, offset starting at 0xEE0 to 0xF0C. These set of registers can be used in two ways based on the address width of the PCIE address. When the PCIe address space is 32 bits, the translation vector should be placed into the AXIBAR_<n>L registers where n is AXI BAR number (0 to 5). When PCIe address space is 64 bits, the most significant 32 bits are written into AXIBAR_<n>U and the least significant 32 bits are written into AXIBAR_<n>L. Care should be taken so that invalid values are not written to the address translation registers.
Four examples follow:
- Example 1 (32-bit PCIe Address Mapping) demonstrates how to set up three AXI BARs and translate the AXI address to a 32-bit address for PCIe.
- Example 2 (64-bit PCIe Address Mapping) demonstrates how to set up three AXI BARs and translate the AXI address to a 64-bit address for PCIe.
- Example 3 demonstrates how to set up two 64-bit PCIe BARs and translate the address for PCIe to an AXI address.
- Example 4 demonstrates how to set up a combination of two 32-bit AXI BARs and two 64 bit AXI BARs, and translate the AXI address to an address for PCIe.