Xilinx Virtual Cable - 3.2 English

MicroBlaze Debug Module LogiCORE IP Product Guide (PG115)

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3.2 English

When using external BSCAN for debugging with the Xilinx® Virtual Cable (XVC), the MDM is connected to a Debug Bridge IP core. This connection is normally automatically inferred by the Vivado® Design Suite, and in this case the MDM BSCAN location should be configured to select EXTERNAL HIDDEN to hide the bus interface in Vivado IP Integrator. If an explicit connection needs to be made, configure the BSCAN location as EXTERNAL instead. For further details on the Debug Bridge, see the Debug Bridge LogiCORE IP Product Guide (PG245).