Debug Register Access Sequence - 3.2 English

MicroBlaze Debug Module LogiCORE IP Product Guide (PG115)
Document ID
PG115
Release Date
2021-01-21
Version
3.2 English
Before starting to use debug register access functionality, the DBG_LOCK register must be written with the magic value (see Debug Register Access Locking Register (DBG_LOCK)) to enable access to the DBG_CTRL and DBG_DATA registers. By writing any other value to the DBG_LOCK register, access is again prohibited.

When the parameter C_DEBUG_INTERFACE is set to 1 or 2, direct debug register access is also available for the MicroBlaze™ debug data registers, in addition to the indirect access using the DBG_CTRL and DBG_DATA registers.

To access a single debug data register in a MicroBlaze processor using indirect debug access or the MDM core the following steps should be used:

  1. Set the DBG_CTRL register value (see Debug Register Access Control Register (DBG_CTRL)) to define the debug register size, the 8-bit MDM core command, whether the register is an MDM core or MicroBlaze debug register, and the Access Lock type 01 (lock before first data access, and unlock after last data access). The DBG_CTRL values for all user accessible debug registers are defined in MDM Core User-Accessible Debug Registers .
  2. Read back the DBG_STAT register (see Debug Register Access Status Register (DBG_STATUS)), and make sure the lock has been acquired. If not, go back to step 1.
  3. Read or write data using the DBG_DATA register. The number of 32-bit accesses must correspond to the register bit size. If the bit size is 32 bits or less, one access is required, if it is 64 bits or less, two accesses are required, and so on.

To perform a sequence of atomic accesses to debug data registers in a MicroBlaze processor using indirect debug access or the MDM core, for example, to write a command followed by reading the corresponding data, the following steps should be used:

  1. Set the DBG_CTRL register value (see Debug Register Access Control Register (DBG_CTRL)) to define the debug register size, the 8-bit MDM core command, whether the register is an MDM or MicroBlaze debug register, and the Access Lock type 10 (lock before first data access, and keep lock).
  2. Read back the DBG_STAT register (see Debug Register Access Status Register (DBG_STATUS)), and make sure lock is acquired. If not, go to step 1.
  3. Read or write data using the DBG_DATA register. The number of 32-bit accesses must correspond to the register bit size.
  4. Repeat from step 1, until the last register to be accessed is reached.
  5. Set the DBG_CTRL register value to define the debug register size, the 8-bit MDM command, whether the register is an MDM or MicroBlaze debug register, and the Access Lock type 01 (lock before first data access, and unlock after last data access) for the last register.
  6. Read back the DBG_STAT register, and ensure that lock is still acquired.
  7. Read or write data using the DBG_DATA register.

Care must be taken to always release the access lock when Boundary Scan is enabled, because JTAG is not able to access the debug registers while it is set. If a sequence of atomic accesses needs to be aborted, the access lock can be released by writing access lock type 00 to the DBG_CTRL register.

To access debug data registers in MicroBlaze using direct debug access, the accessed MicroBlaze processors must first be set using the Which MicroBlaze debug register. Also, if Boundary Scan is enabled, the DBG_CTRL register must be used to define the Access Lock type in the same way as described above for indirect debug access.