This section provides information about any changes to the user logic or port designations that take place when you upgrade to a more current version of this IP core in the Vivado Design Suite.
The AXI4-Lite slave interface address width parameter, C_S_AXI_ADDR_WIDTH, has been changed to only use the necessary number of bits to decode the AXI slave registers. The parameter is normally automatically determined, and need not be explicitly set.