- Support for JTAG-based software debug tools
- Support for debugging up to 32 MicroBlaze processors
- Support for synchronized control of multiple MicroBlaze processors
- Support for a JTAG-based UART with a configurable AXI4-Lite interface
- Based on Boundary Scan (BSCAN) logic in Xilinx® devices
- Direct JTAG-based access to memory with a configurable AXI4 master interface
- Configurable software access to debug functionality through the AXI4-Lite interface
- Support for cross-trigger between connected MicroBlaze cores, Zynq®-7000 Processing System, Zynq® UltraScale+™ MPSoC, Versal™ Control, Interfaces and Processing System, and Integrated Logic Analyzer (ILA) cores
- External trace function to funnel program trace from connected MicroBlaze cores to external interfaces
- Connection to Debug Bridge through external BSCAN to support Xilinx Virtual Cable (XVC)