Report Utilization - 2023.2 English

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2023-10-19
Version
2023.2 English

The Report Utilization Report helps you analyze the utilization of the design with different resources, at the hierarchical, user-defined Pblocks, or SLR level. You can generate the Utilization Report during various steps in the flow with the report_utilization Tcl command. (For details on Tcl command usage see the Vivado Design Suite Tcl Command Reference Guide (UG835).) The report details shown below are for AMD UltraScale™ and AMD UltraScale+™ families. It includes the device used for the run and utilization for the following (additional items might appear in each category):

  • Slice Logic
    • LUT
    • MuxFx
    • Register
    • Slice
    • LUT as Memory
    • LUT Flip-Flop pairs
    • LUT as Logic
  • Memory
    • BlockRam
    • FIFO
  • DSPs
  • I/O Resources
  • Clocking Resources
  • Specific Device Resources. For example,
    • STARTUPE2
    • XADC
  • Primitive type count sorted by usage
  • Black Boxes
  • Instantiated Netlists
  • SLR Crossing Utilization

When run from the Tcl Console, the report can include usage of a particular hierarchical cell when using the -cells option. When run from the AMD Vivado™ IDE, this information appears in an interactive table.

The numbers might change at various points in the flow, when logic optimization commands change the netlist.