Due to the importance of methodology, the AMD Vivado™
tools
provide the report_methodology
command, which
specifically checks for compliance with methodology DRCs. There are different types of
DRCs depending on the stage of the design process. RTL lint-style checks are run on the
elaborated RTL design; netlist-based logic and constraint checks are run on the
synthesized design; and implementation and timing checks are run on the implemented
design.
To run these checks at the Tcl prompt, open the design to be validated and enter following Tcl command:
report_methodology
To run these checks from the IDE, open the design to be validated and run the Report Methodology command from the Flow Navigator in project mode, or from
. The dialog box appears, as shown in the following figure.Violations (if there are any) are listed in the Methodology window, as shown in the following figure.
For more information on running design methodology DRCs, refer to this link in the Vivado Design Suite User Guide: System-Level Design Entry (UG895).