When transferring between sequential cells or ports, the data is:
- Launched by one of the edges of the source clock, which is called the launch edge.
- Captured by one of the edges of the destination clock, which is called the capture edge.
In a typical timing path, the data is transferred between two sequential cells within one clock period. In that case: (1) the launch edge occurs at 0 ns; and (2) the capture edge occurs one period after.
The following section explains how the launch and capture edges define the setup and hold relationships used for timing analysis.