In SST or MST mode, by default, the subsystem is packaged with two subcores:
- DisplayPort Receive core
- AXI IIC controller
An HDCP core and an AXI Timer core also form part of the DisplayPort RX Subsystem when the HDCP feature is enabled.
Because the DisplayPort RX Subsystem is hierarchically packaged, you select the parameters and the subsystem creates the required hardware. The following figure shows the architecture of the subsystem assuming MST with four streams. The DisplayPort RX Subsystem receives the video using the DisplayPort v1.2a protocol over 32-bit or 16-bit video PHY interface.
Figure 1. DisplayPort RX Subsystem Block Diagram with Native Video Interface
