In SST mode and when the AXI4-Stream video interface is selected, the subsystem is packaged with the following cores:
- DisplayPort Receive core
- DisplayPort Video to AXI4-Stream Bridge
- AXI IIC controller for connecting to the TI DP159
The HDCP core and an AXI Timer core also form part of the DisplayPort RX Subsystem when the HDCP feature is enabled.
In MST mode, in addition to the subcores listed for SST, the Video to AXI4-Stream Bridge instances increase to the number of video streams.
The DisplayPort RX Subsystem is hierarchically packaged. After selecting the parameters, the subsystem creates the required hardware. The following figure shows the architecture of the subsystem with the assumption that MST has four streams. The DisplayPort RX Subsystem receives the video using the DisplayPort v1.2a protocol over a 32-bit or 16-bit video PHY interface.
