| 05/25/2023 Version
2.1 |
|
VC Payload ID Reordering in MST
|
Added section. |
| 06/03/2020 Version 2.1 |
|
Software Debug
|
|
| 06/17/2019 Version 2.1 |
| N/A |
Minor Updates |
| 12/05/2018 Version 2.1 |
| N/A |
|
| 04/04/2018 Version 2.1 |
| N/A |
- Added Native Video support and dynamic lane supports in IP
facts table.
- Added DP159 retimer in Overview chapter.
- Updated Unsupported Features section in Overview chapter.
- Updated Overview section in Product Specification chapter.
- Added AXI4-Stream Interface Data Mapping table in Product
Specification chapter.
- Updated Pixel Mapping Examples on AXI4-Stream Interface table.
- Added Audio Streaming Signals section.
- Updated DisplayPort RX Subsystem Ports table in Product
Specification chapter.
- Added IP integrator description in Register Space section in
Product Specification chapter.
- Updated Clock section and Address Map Example table in
Designing with the Core chapter.
- Updated Customizing the IP section in Design Flow Steps
chapter.
- Updated Constraining the Core section in Design Flow Steps
chapter.
- Added available example designs in Example Design chapter.
- Added JTAG mode pin position KCU105 figure in Example Design
chapter.
- Added HDCP Support and Operation and Configuring HDCP Keys and
Key Management sections in the Example Design chapter.
- Added Software Debug section in Debugging appendix.
|
| 12/20/2017 Version 2.1 |
| N/A |
- Added Vivado IP Integrator to IP Facts table.
- Updated Setting the FMC Voltage to 1.8V section.
- Added EDID in FAQ appendix.
|
| 10/04/2017 Version 2.0 |
| N/A |
- Updated Supported Device Family in IP Facts.
- Added MCCS over DDC/CI is not supported in Unsupported
Features section.
- Added Pixel Mapping for Stream Interface table and Pixel
Mapping to Native Interface section in Product Specification chapter.
- Added offset description in 0x09C and 0x0A0 in DisplayPort
Sink Core Configuration Space table.
- Added Example Design chapter.
- Added Upgrading appendix.
- Added FAQ appendix.
- Added new Driver Documentation appendix.
|
| 07/14/2017 Version
2.0 |
| N/A |
Updated 7 series (GTHE2) and Artix-7 support in IP
Facts. |
| 06/07/2017 Version
2.0 |
| N/A |
Vivado Design Suite release for DisplayPort RX v2.0. |
| 04/05/2017 Version
2.0 |
| N/A |
- Updated Supported Device Family in IP Facts table.
- Added In-band stereo in Unsupported Features section.
- Added 0x01C, Bit[8] and 0x21C, Bit[30] description to
DisplayPort Sink Core Configuration Space table in Product Specification
chapter.
- Added DisplayPort Registers Sink Core in Product
Specification chapter.
- Added DisplayPort Overview in Designing with the Core
chapter.
- Updated rx_vid_clk clock min/max range in Clock Ranges table
in Designing with the Core chapter.
- Added Reduced Blanking in Designing with the Core chapter.
- Updated Hardware Debug section in Debug Appendix.
|
| 12/20/2016 Version 2.0 |
| N/A |
Added HDCP note for Supported Device Family in IP Facts table. |
| 11/30/2016 Version 2.0 |
| N/A |
Added Important note in Standards section. |
| 10/05/2016 Version 2.0 |
| N/A |
Updated HDCP features. |
| 04/06/2016 Version 2.0 |
| N/A |
Added support for 16 bit GT interface and native with pixel mode. |
| 11/18/2015 Version 1.0 |
| Initial Xilinx release. |
N/A |