When you select 512-bit interface, review the Pblock constraints in the AMD top XDC file of the example design. They are required to keep the soft 512-bit AXI4-Stream logic near the PCIe integrated block to improve the timing.
When you select 512-bit interface, review the Pblock constraints in the AMD top XDC file of the example design. They are required to keep the soft 512-bit AXI4-Stream logic near the PCIe integrated block to improve the timing.