Bank 65 contains dedicated and dual-mode configuration pins. Tandem
Configuration can use many of these pins, including the dedicated PCIe reset pin (PERSTN)
in UltraScale+ devices, and many configuration
pins, such as EMCCLK, CSI_B and address and data pins for wider interfaces. Because the use of
the EMCCLK offers more precise clocking (lower tolerance) than the internal CCLK for
master configuration modes, it is recommended for use to meet the 100 ms goal which is
the primary purpose of Tandem Configuration.
Important:
AMD advises Tandem Configuration users to avoid using bank 65 for
design applications, especially when using Tandem PROM, to avoid complications because
the programming bitstream is split into two stages. Specifically, IP cores built by the
Memory Interface Generator (MIG) must not use bank 65 I/O. This ensures that IP can
remain completely within stage 2, and avoid complications with its embedded I/O and
demanding timing constraints.
To see the pins required for your desired configuration mode, see the configuration diagrams in the UltraScale Architecture Configuration User Guide (UG570).