The Root Port Model is designed to work with the PIO design and is therefore tailored to perform specific checks and generate warnings based on the limitations of the PIO design. These checks and warnings are enabled by default when the Root Port Model is generated from the Vivado IP catalog. You can disable these limitations so that they do not affect a customer design.
The PIO design supports a maximum of one I/O BAR, one Mem64 BAR, and two
Mem32 BARs, one of which corresponds to the EROM space. By default, the Root Port Model
checks the device configuration to verify that the core meets this requirement. When
this check detects a violation, the test bench displays a warning message and gracefully
disables the offending BAR. Disable this check by setting the
pio_check_design variable to zero in the
pci_exp_usrapp_tx.v file.