Tandem PCIe with Field Updates designs are designs that use Dynamic Function
eXchange flows. The Update Region is a Reconfigurable Partition, and each User
Application that is inserted into that partition is a Reconfigurable Module. General
debug within Reconfigurable Modules is now supported, and the example design that can be
generated for any Tandem PCIe with Field Updates IP instance contains debug circuitry.
The top level of the Reconfigurable Partition (pci_app_uscale) includes the boundary scan ports necessary for automatic
insertion of the debug hub that permits debug cores to be instantiated within each
Reconfigurable Module. Look for the S_BSCAN ports but do
not change the pin names. For complete details, see Chapter 8 of
Vivado
Design Suite User Guide: Dynamic Function eXchange (UG909).