The Loopback Master feature is implemented in the VSEC space (see PCI Express Extended Configuration Space).
Loopback Master capability for Root Port starts at byte address 'h330. To exercise Loopback Start, use the cfg_mgmt interface to write 1'b1 to bit 0
in byte address 'h338 (Loopback Control).
Because
cfg_mgmt uses DW addresses, use cfg_mgmt_write_data = 32'h1
to address: -
cfg_mgmt_address=10'hCE -
cfg_mgmt_write=1'b1 -
cfg_mgmt_byte_enable=4'b1
After Start Loopback, retrain the link by writing to the link control register
(byte address:
'h80, DW address: 'h20). Use cfg_mgmt_write_data = 'h20 to address:-
cfg_mgmt_address=10'h20 -
cfg_mgmt_write=1'b1 -
cfg_mgmt_byte_enable=4'b1