The streaming interface allows the Aurora 8B/10B channel to be used as a pipe. After initialization, the channel is always available for writing, except when sending clock compensation sequences. Core data transfer is compliant with the AXI4-Stream protocol.
When s_axi_tx_tvalid is deasserted, gaps are created between words and the gaps are preserved, except when clock compensation sequences are being transmitted.
When data arrives at the RX side of the Aurora 8B/10B channel it is presented on the m_axi_rx_tdata bus and m_axi_rx_tvalid is asserted. The data must be read immediately or it is lost. If this is unacceptable, a buffer must be connected to the RX interface to hold the data until it can be used.