Using the Scrambler/Descrambler - 11.1 English

Aurora 8B/10B LogiCORE IP Product Guide (PG046)

Document ID
PG046
Release Date
2023-10-19
Version
11.1 English

A 16-bit additive scrambler/descrambler, implemented for data with the polynomial: G(x) = X16 + X5 + X4 + X3 + 1, is available in the <component name>_scrambler.v[hd] module.

It ensures non-occurrence of repetitive data over long periods of time. The scrambler and descrambler are synchronized based on transmission and reception of the clock compensation characters respectively.

Note:   The scrambler affects data symbols only.