See the diagram in the information area in This Figure. Two rows or four boxes represent a quad. Each active box represents an available transceiver. A tooltip is provided to specify which transceiver (for example, GTXE2_CHANNEL_X0Y0) is being implemented in hardware.
The Aurora 8B/10B core generates transceiver placement (LOC) constraints in ascending fashion. Lane numbering serves only to enable the lanes and not to assign lane numbers.
RECOMMENDED: Always select consecutive/physically adjacent lanes for a multi-GT design.