Macro: Equality Comparator
Introduction
EQ_COMPARE_MACRO simplifies the instantiation of the DSP48 block when used as an equality comparator. It features parameterizable input and output widths, latencies, mask, and input sources that ease the integration of the DSP48 block into HDL.
Port Descriptions
Port | Direction | Width | Function |
---|---|---|---|
Q | Output | 1 | Active-High pattern detection. Detects match of DATA_IN and the selected DYNAMIC_PATTERN gated by the MASK. Result arrives on the same cycle as P. |
DATA_IN | Input | Variable width, equals the value of the WIDTH attribute. | Input data to be compared. |
DYNAMIC_PATTERN | Input | Variable width, equals the value of the WIDTH attribute. | Dynamic data to be compared to DATA_IN. |
CLK | Input | 1 | Clock. |
CE | Input | 1 | Clock enable. |
RST | Input | 1 | Synchronous Reset. |
Design Entry Method
This unimacro is a parameterizable version of the primitive, and can be
instantiated only.
Instantiation | Yes |
Inference | No |
IP Catalog | No |
Macro support | Recommended |
Available Attributes
Attribute | Type | Allowed Values | Default | Description |
---|---|---|---|---|
DEVICE | STRING | "7SERIES" | "7SERIES" | Target hardware architecture. |
SEL_PATTERN | INTEGER | 1 to 24 | 24 | Controls the width of PREADD1 and PREADD2 inputs. |
MASK | HEX | 48 hex | all zeros | Mask to be used for pattern detector. |
STATIC_PATTERN | HEX | 48 hex | all zeros | Pattern to be used for pattern detector. |
SEL_MASK | STRING | "MASK", "DYNAMIC_PATTERN" | "MASK" | Selects whether to use the static MASK or the C input for the mask of the pattern detector. |
WIDTH | INTEGER | 1 to 48 | 48 | Width of DATA_IN and DYNAMIC_PATTERN. |
LATENCY | INTEGER | 0, 1, 2, 3 | 2 | Number of pipeline registers.
|
VHDL Instantiation Template
Unless
they already exist, copy the following four statements and paste them
before the entity declaration.
Library UNISIM;
use UNISIM.vcomponents.all;
library UNIMACRO;
use unimacro.Vcomponents.all;
-- EQ_COMPARE_MACRO: Equiality Comparator implemented in a DSP48E
-- 7 Series
-- Xilinx HDL Language Template, version 2024.1
EQ_COMPARE_MACRO_inst : EQ_COMPARE_MACRO
generic map (
DEVICE => "7SERIES", -- Target Device: "VIRTEX5", "7SERIES"
LATENCY => 2, -- Desired clock cycle latency, 0-2
MASK => X"000000000000", -- Select bits to be masked, must set
-- SEL_MASK = "MASK"
SEL_MASK => "MASK", -- "MASK" = use MASK generic,
-- "DYNAMIC_PATTERN = use DYNAMIC_PATTERN input bus
SEL_PATTERN => "DYNAMIC_PATTERN", -- "DYNAMIC_PATTERN" = use DYNAMIC_PATTERN input bus
-- "STATIC_PATTERN" = use STATIC_PATTERN generic
STATIC_PATTERN => X"000000000000", -- Specify static pattern,
-- must set SEL_PATTERN = "STATIC_PATTERN
WIDTH => 48) -- Comparator output bus width, 1-48
port map (
Q => Q, -- 1-bit output indicating a match
CE => CE, -- 1-bit active high input clock enable input
CLK => CLK, -- 1-bit positive edge clock input
DATA_IN => DATA_IN, -- Input Data Bus, width determined by WIDTH generic
DYNAMIC_PATTERN, => DYNAMIC_PATTERN, -- Input Dynamic Match/Mask Bus, width determined by WIDTH generic
RST => RST -- 1-bit input active high reset
);
-- End of EQ_COMPARE_MACRO_inst instantiation
Verilog Instantiation Template
// EQ_COMPARE_MACRO: Equality Comparator implemented in a DSP48E
// 7 Series
// Xilinx HDL Language Template, version 2024.1
EQ_COMPARE_MACRO #(
.DEVICE("7SERIES"), // Target Device: "7SERIES"
.LATENCY(2), // Desired clock cycle latency, 0-2
.MASK(48'h000000000000), // Select bits to be masked, must set SEL_MASK="MASK"
.SEL_MASK("MASK"), // "MASK" = use MASK parameter,
// "DYNAMIC_PATTERN" = use DYNAMIC_PATTERN input bus
.SEL_PATTERN("STATIC_PATTERN"), // "STATIC_PATTERN" = use STATIC_PATTERN parameter,
// "DYNAMIC_PATTERN = use DYNAMIC_PATTERN input bus
.STATIC_PATTERN(48'h000000000000), // Specify static pattern, must set SEL_PATTERN = "STATIC_PATTERN"
.WIDTH(48) // Comparator output bus width, 1-48
) EQ_COMPARE_MACRO_inst (
.Q(Q), // 1-bit output indicating a match
.CE(CE), // 1-bit active high input clock enable
.CLK(CLK), // 1-bit positive edge clock input
.DATA_IN(DATA_IN), // Input Data Bus, width determined by WIDTH parameter
.DYNAMIC_PATTERN(DYNAMIC_PATTERN), // Input Dynamic Match/Mask Bus, width determined by WIDTH parameter
.RST(RST) // 1-bit input active high reset
);
// End of EQ_COMPARE_MACRO_inst instantiation