About Unimacros
This section describes the unimacros that can be used with 7 series FPGAs and AMD Zynq™ 7000 SoC devices devices. The unimacros are organized alphabetically.
The following information is provided for each unimacro, where applicable:
- Name and description
- Schematic symbol
- Logic table (if any)
- Introduction
- Port descriptions
- Design Entry Method
- Available attributes
- Example instantiation templates
- Links to additional information
List of UniMacros
| Design Element | Description |
|---|---|
| BRAM_SDP_MACRO | Macro: Simple Dual Port RAM |
| BRAM_SINGLE_MACRO | Macro: Single Port RAM |
| BRAM_TDP_MACRO | Macro: True Dual Port RAM |
| ADDMACC_MACRO | Macro: Adder/Multiplier/Accumulator |
| ADDSUB_MACRO | Macro: Adder/Subtractor |
| COUNTER_LOAD_MACRO | Macro: Loadable Counter |
| COUNTER_TC_MACRO | Macro: Counter with Terminal Count |
| EQ_COMPARE_MACRO | Macro: Equality Comparator |
| MACC_MACRO | Macro: Multiplier/Accumulator |
| MULT_MACRO | Macro: Multiplier |
| FIFO_DUALCLOCK_MACRO | Macro: Dual Clock First-In, First-Out (FIFO) RAM Buffer |
| FIFO_SYNC_MACRO | Macro: Synchronous First-In, First-Out (FIFO) RAM Buffer |