Logic Simulation Overview - 2024.1 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2024-05-30
Version
2024.1 English

Simulation is a process of emulating real design behavior in a software environment. Simulation helps verify the functionality of a design by injecting stimulus and observing the design outputs.

This chapter provides an overview of the simulation process, and the simulation options in the AMD Vivado™ Design Suite.

The process of simulation includes:

  • Creating test benches, setting up libraries, and specifying the simulation settings for Simulation
  • Generating a Netlist (if performing post-synthesis or post-implementation simulation)
  • Running a Simulation using Vivado simulator or third party simulators. See Supported Simulators for more information on supported simulators.