Analyzing Simulation Waveforms with Vivado Simulator - 2024.1 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2024-05-30
Version
2024.1 English

In the AMD Vivado™ simulator, you can use the waveform to analyze your design and debug your code. The simulator populates design signal data in other areas of the workspace, such as the Objects and the Scope windows.

Typically, simulation is set up in a test bench where you define the HDL objects you want to simulate. For more information about test benches, see Writing Efficient Test Benches (XAPP199).

When you launch the Vivado simulator, a wave configuration displays with top-level HDL objects. The Vivado simulator populates design data in other areas of the workspace, such as the Scope and Objects windows. You can then add additional HDL objects, or run the simulation. See Using Wave Configurations and Windows below.