Elaborating and Generating a Design Snapshot, xelab - 2024.1 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2024-05-30
Version
2024.1 English

Simulation with the Vivado simulator happens in two phases:

  • In the first phase, the simulator compiler xelab, compiles your HDL model into a snapshot, which is a representation of the model in a form that the simulator can execute.
  • In the second phase, the simulator loads and executes (using the xsim command) the snapshot to simulate the model. In Non-Project Mode, you can reuse the snapshot by skipping the first phase and repeating the second.

When the simulator creates a snapshot, it assigns the snapshot a name based on the names of the top modules in the model. However, you can override the default by specifying a snapshot name as an option to the compiler. Snapshot names must be unique in a directory or SIMSET; reusing a snapshot name, whether default or custom, results in overwriting a previously-built snapshot with that name.

Important: You cannot run two simulations with the same snapshot name in the same directory or SIMSET.