You can use a Value Change Dump (VCD) file to capture simulation output. The Tcl commands are based on Verilog system tasks related to dumping values.
For the VCD feature, the Tcl commands listed in the following table model the Verilog system tasks.
Tcl Command | Description |
---|---|
open_vcd
|
Opens a VCD file for capturing simulation output. This
Tcl command models the behavior of $dumpfile Verilog system task. |
checkpoint_vcd
|
Models the behavior of the $dumpall Verilog system task. |
start_vcd
|
Models the behavior of the $dumpon Verilog system task. |
log_vcd
|
Logs VCD for the specified HDL objects. This command
models the behavior of the $dumpvars
Verilog system task. |
flush_vcd
|
Models the behavior of the $dumpflush Verilog system task. |
limit_vcd
|
Models the behavior of the $dumplimit Verilog system task. |
stop_vcd
|
Models the behavior of the $dumpoff Verilog system task. |
close_vcd
|
Closes the VCD generation. |
See the Vivado Design Suite Tcl Command Reference Guide (UG835), or type the following in the Tcl Console:
Note: These commands work for both RTL and SystemC
designs.
<command> -help
Example:
open_vcd xsim_dump.vcd
log_vcd /tb/dut/*
log_vcd -include_systemc * /tb/dut/hier1/sc_object
log_vcd -ports * /tb/dut/HDL_signal
run all
close_vcd
quit
See Verilog Language Support Exceptions for more information.
You can use the VCD data to validate the output of the simulator to debug simulation failures.