Create a Project - 1.0 English - PG320

Advanced IO Wizard LogiCORE IP Product Guide (PG320)

Document ID
PG320
Release Date
2025-03-19
Version
1.0 English

To begin the tutorial, start the AMD Vivado™ Design Suite, create the tutorial project, and create a basic block design.

  1. Open the Vivado Design Suite.
  2. Click Create Project from the Quick Start Menu and step through the following:
    1. Specify the Project name project_Versal in your working area.
    2. Specify RTL Project, and clear the Do not specify sources at this time check box.
    3. Do not specify any HDL sources.
    4. Create a constraint file called top.xdc, and select the Copy constraints files into project check box.
    5. In the Default Part menu, locate and select xcvc1902-vsvd1760-1LP-e-S.
    6. Continue to Finish to create the new project.
  3. In the Vivado Flow Navigator, click IP Integrator > Create Block Design. A popup dialog box displays with the default block design name design_1.
  4. Click OK. An empty block design diagram canvas open.

The Tcl commands used to create the project, constraints file, and initial block design are as follows:

create_project project_Versal \
              ./project_Versal \
              -part xcvc1902-vsvd1760-1LP-e-S

file mkdir ./project_Versal/project_Versal.srcs/constrs_1/new

close [open \
  "./project_Versal/project_Versal.srcs/constrs_1/new/top.xdc" w]

add_files \
  -fileset constrs_1 ./project_Versal/project_Versal.srcs/constrs_1/new/top.xdc

set_property target_constrs_file \
  ./project_Versal/project_Versal.srcs/constrs_1/new/top.xdc \
  [current_fileset -constrset]

create_bd_design "design_1"