Pin Configuration tab provides the interface level number of I/O data channels and each selected pin allows you to set the pin direction [TX, RX and BiDir], signal type (Differential/Single ended), signal name, and also selects a pin as Data, Strobe/Clock, Input Clock or Clock Forward as shown in the following figure:
Figure 1. Pin Configuration Tab
- Bus Direction
- Sets the bus direction on the selected pin. Available options are:
- TX: Pin direction is set to TX; option is not available when RX only option is selected for Bus Direction under the General tab.
- RX: Pin direction is set to RX; option is not available when TX only option is selected for Bus Direction under the General tab
- BIDIR: Pin direction is set to Bidirectional. This option is not available in the following cases.
- TX only or RX only or TX and RX are selected for Bus Direction under the General tab.
- IO Type
- Sets the IO type to differential or single ended.
- Signal Type
- Allows the pin to be selected as data/input clock/Clk Fwd.
- Data Sets the pin as a data pin.
- Clk Fwd Valid only for the TX bus direction. The number of clk fwd pins in a interface should be less than or equal to the number of data pins.
- Input Clock Sets the pin as a clock pin. The input clock should be on this pin. Only GC/GC_XCC pins can be set as input clock pins. This option is available if Clock Capable Pin is selected for XPLL Clock Source under the Basic tab.
- Enable Strobe/RdClk
- This option is available only for RX and BIDIR pins to choose the Strobe pin associated with the Data pins.
- Strobe/RdClk IO Type
- Sets the IO type to the Strobe signal to differential or single ended.
- Strobe/RdClk Name
- User defined name given to Strobe signal.
- Enable WrClk
- This option is available only for BIDIR pins to choose the WrClk pin associated with the data pins. It is available when BIDIR_MODE is selected as independent WrClk and RdClk.
- Strobe/RdClk IO Type
- Sets the IO type to the WrClk signal to differential or single ended.
- Strobe/RdClk Name
- User defined name given to WrClk signal.
- Signal Name
- User defined name given to the data/clock forward signal.
- Number of Data Channels
- User selection to define the number of channels needed in the selected signal.
- Strobe selection for PLL Input clock
- This will be active/enabled to user to chose the strobe to be connected to PLL input in the case of Data PLL capture clock enablement.